Hardware Platforms

class squishy.gateware.platform.SquishyPlatform

Base Squishy Hardware platform

This represents all the common properties and methods that all Squishy hardware platforms are required to have.

This also implements the applet bitstream cache mechanisms.

Variables:

  • revision (tuple[int, int]) – The revision of the hardware this platform supports, in the form of (major, minor).

  • revision_str (str) – The canonicalize revision as a string in the form of ‘major.minor’.

  • bitstream_suffix (str) – The suffix of the FPGA bitstream that is generated when gateware is built for this platform.

  • flash (FlashConfig) – The configuration of the attached SPI boot flash.

  • pll_cfg (PLLConfig) – The PLL configuration that is passed to the clk_domain_generator of this platform when instantiated.

  • clk_domain_generator (type[torii.Elaboratable]) – The type of clock domain generator for this platform. It is instantiated and hooked up to the gateware on elaboration.

  • ephemeral_slot (int | None) – If this platform supports ephemeral applet flashing, then this is the DFU alt-mode to use, otherwise None

Important

Platforms are also still required to inherit from the appropriate torii.vendor.platform in order to properly be used.

abstract property revision: tuple[int, int]

The hardware revision of this platform in the form of (major, minor)

property revision_str: str

The canonicalize revision as a string in the form of ‘major.minor’

abstract property bitstream_suffix: str

The suffix of the FPGA bitstream that is generated when gateware is built for this platform

abstract property flash: FlashConfig

The attached SPI boot flash configuration

abstract property pll_cfg: ECP5PLLConfig | ICE40PLLConfig

PLL Configuration for the platforms clock domain generator

abstract property clk_domain_generator: type[Elaboratable]

The Torii Elaboratable used to setup the PLL and clock domains for the platform

property ephemeral_slot: int | None

If this platform supports ephemeral applet flashing, then this is the DFU alt-mode to use

abstract pack_artifact(artifact: bytes) → bytes

Pack a signal bitstream image into a device appropriate artifact.

Parameters:

artifact (bytes) – The input data of the result of gateware elaboration, typically the raw FPGA bitstream file.

Returns:

The result of the artifact packing process

Return type:

bytes

abstract build_image(name: str, build_dir: Path, boot_name: str, products: BuildProducts) → Path

Build a platform compatible flash image for provisioning.

Parameters:

  • name (str) – The name of the flash image to produce.

  • build_dir (Path) – Output directory for the finalized flash image.

  • boot_name (str) – The name of the bootloader in the build products

  • products (BuildProducts) – The resulting build products from the bootloader build.

Returns:

The path to the resulting image file.

Return type:

Path

all_resources_by_name(name: str) → list[Resource]

Get all resources sharing a common root name, e.g. all LEDs

Parameters:

name (str) – The base name of the resources to collect.

Returns:

A list of all of the found Torii resources matching the given base name.

Return type:

list[Resources]