Peripherals¶
- class squishy.gateware.peripherals.spi.SPIInterface(*args: Any, src_loc_at: int = 0, **kwargs: Any)¶
An SPI interface that can act as both an SPI controller and/or an SPI peripheral.
- Parameters:
clk (Subsignal, inout) – The SPI bus clock line.
cipo (Subsignal, inout) – The SPI bus CIPO line.
copi (Subsignal, inout) – The SPI bus COPI line.
cs_peripheral (Subsignal, in) – The chip-select signal to route to the SPIPeripheral
cs_controller (Subsignal, out) – The chip-select signal to route out from the SPIController
mode (SPIInterfaceMode) – The mode this SPI interface represents, either a SPI Controller, a SPI Peripheral, or both.
cpol (SPICPOL) – The SPI bus clock electrical idle. (default: HIGH)
cpha (SPICPHA) – The SPI bus clock phase. (default: RISING)
reg_map (torii.lib.soc.csr.Multiplexer | None) – The CSR register map to feed the
SPIPeripheral
if mode is eitherPERIPHERAL
orBOTH
- Variables:
active_mode (Signal) – This signal is only present if
mode
isBOTH
. It controls the output-enables for the COPI, CIPO, and CLK lines depending if it is high, for the controller, or low, for the peripheral.
- controllerSPIController
The
SPIController
module ifmode
isCONTROLLER
orBOTH
.- peripheralSPIPeripheral
The
SPIPeripheral
module ifmode
isPERIPHERAL
orBOTH
.
- class squishy.gateware.peripherals.spi.SPIInterfaceMode(value, names=None, *, module=None, qualname=None, type=None, start=1, boundary=None)¶
The operating mode for
SPIInterface
- CONTROLLER = 1¶
Enable the
SPIController
insideSPIInterface
- PERIPHERAL = 2¶
Enable the
SPIPeripheral
insideSPIInterface
- BOTH = 3¶
Enable both the
SPIController
and theSPIPeripheral
insideSPIInterface
- class squishy.gateware.peripherals.spi.SPIController(*args: Any, src_loc_at: int = 0, **kwargs: Any)¶
A generic SPI Bus Controller for a SPI bus with one peripheral on it. (for now)
- Parameters:
clk (Signal, out) – The clock generated for the SPI bus from this controller.
cipo (Signal, in) – The data signal coming in from the peripherals on the bus.
copi (Signal, out) – The data signal going out to the SPI bus from this controller.
cs (Signal, out) – The selection signal for the device on the SPI bus.
cpol (SPICPOL) – The SPI bus clock electrical idle. (default: HIGH)
cpha (SPICPHA) – The SPI bus clock phase. (default: RISING)
- Variables:
cs (Signal) – SPI Chip Select.
xfr (Signal) – Transfer strobe.
done (Signal) – Transfer complete signal.
wdat (Signal(8)) – Write data register.
rdat (Signal(8)) – Read data register.
- class squishy.gateware.peripherals.spi.SPIPeripheral(*args: Any, src_loc_at: int = 0, **kwargs: Any)¶
A SPI peripheral that exposes a set of registers to the SPI bus.
- Parameters:
clk (Signal, in) – The incoming SPI Bus clock signal
cipo (Signal, out) – The output from the SPI peripheral to the bus.
copi (Signal, in) – The input from the controller on the SPI bus to the peripheral.
cs (Signal, in) – The chip-select signal from the SPI bus to indicate this peripheral should be active.
reg_map (torii.lib.soc.csr.Multiplexer) – The CSR register map to expose to the SPI bus.
- class squishy.gateware.peripherals.spi.SPICPOL(value, names=None, *, module=None, qualname=None, type=None, start=1, boundary=None)¶
The state of the electrical idle for the SPI controller clock
- LOW = 0¶
SPI Controller clock is electrical idle high
- HIGH = 1¶
SPI Controller clock is electrical idle low